PEEL22CV10AP / PEEL22CV10AS

Combines, stores or sequences digital signals.

Tutorial / documentation

Logic & timing

Quick documentation & first test preparation

  1. Identify component PEEL22CV10AP and its package.
  2. Read the truth table or timing diagram.
  3. Check the logic family, power supply and states of unused inputs.
  4. Consult the application circuit in the linked documentation before testing.

PEEL22CV10AP

Not in Production, CMOS Programmable Electrically Erasable Logic Device, DIP-24

  • Not in Production, CMOS Programmable Electrically Erasable Logic Device, DIP-24
  • Read the truth table or timing diagram.
  • Check the logic family, power supply and states of unused inputs.
  • The manufacturer’s pinout and absolute limits take precedence over this page.
Technical documentation

PEEL22CV10AS

Not in Production, CMOS Programmable Electrically Erasable Logic Device, SOIC-24W

  • Not in Production, CMOS Programmable Electrically Erasable Logic Device, SOIC-24W
  • Read the truth table or timing diagram.
  • Check the logic family, power supply and states of unused inputs.
  • The manufacturer’s pinout and absolute limits take precedence over this page.
Technical documentation