Si5342A-D / Si5342B-D

Combines, stores or sequences digital signals.

Tutorial / documentation

Logic & timing

Quick documentation & first test preparation

  1. Identify component Si5342A-D and its package.
  2. Read the truth table or timing diagram.
  3. Check the logic family, power supply and states of unused inputs.
  4. Consult the application circuit in the linked documentation before testing.

Si5342A-D

Jitter Attenuator/Clock Multiplier, 2 channel, Fractional, 0.001-1028 MHz, QFN-44

  • Jitter Attenuator/Clock Multiplier, 2 channel, Fractional, 0.001-1028 MHz, QFN-44
  • Read the truth table or timing diagram.
  • Check the logic family, power supply and states of unused inputs.
  • The manufacturer’s pinout and absolute limits take precedence over this page.
Technical documentation

Si5342B-D

Jitter Attenuator/Clock Multiplier, 2 channel, Fractional, 0.001-350 MHz, QFN-44

  • Jitter Attenuator/Clock Multiplier, 2 channel, Fractional, 0.001-350 MHz, QFN-44
  • Read the truth table or timing diagram.
  • Check the logic family, power supply and states of unused inputs.
  • The manufacturer’s pinout and absolute limits take precedence over this page.
Technical documentation